Holiday
Week (starting Monday 29nd
October 2001)Archive of Teaching Coverage for 2001-2002:
Key: TBA = to be announced
Week 1 (Monday 17th September 2001)
Wednesday 11.15
Revision examples in programming, physics and computer science.
Wednesday 1.15
Answers to the problems. Discussion of programming techniques. Brief preview of Karnaugh Maps. Didn't get to do the circuit examples.
Wednesday 4.15
Viewing of class web site. Revision of essential supporting concepts in Windows and DOS. Work sheet on web. Not all computers web-connected. Not a great familiarity with DOS in the class.
Friday 10.15
Class cancelled
Week 2 (Monday 24th September 2001)
Wednesday 11.15 and 1.15
Revision of dc circuits through examples. Number systems; note dictated on information representation in a computer. Note on BCD. Examples of BCD conversion to be tackled next day.
Wednesday 4.15
Repeat of last week's practical. Hard copies of the web page for this practical will be handed out.
Friday 10.15
Memory sizes in the last twenty years generalised to computer specs in general. Completion of BCD
Week 3 (Monday 1st October 2001)
Wednesday 11.15 and 1.15
Topics from among: Revision of BCD. Address length (8, 16, 24 and 32 bit) and address buses, block diagram of the microprocessor-based board. Discussion of fetch execute cycle, of a, d, and c buses and their directionality, of IR, ALU, PC. Notes yet to be written on these registers. Idea of an address being issued by the microprocessor and then the location with that address yielding its contents for transmission into the microprocessor. If the data being taken in by mp is in fact an instruction it goes into the IR. If the data being taken in is end data, it goes into a data register. Issues of binary numbers and memory size.
Wednesday 4.15
Discussion given of the practicals for weeks 1 and 2. Some people sat their DOS/WIN practical tests.
Friday 10.15
Revision of Wednesday's work. The architecture of the 68000 CPU from the programmer's viewpoint. It consists of 8 data registers (D0 to D7) each 32 bits long and 8 address registers (A0 to A7) each 32 bits long. There's also the IR, the PC and the ALU. Discussion of the bus structure of the microprocessor and the chips. Crucial concepts: 4 bits for each hex digit. 8 bits = 2 hits (my word for hex digits) = 1 byte. 4 bytes = 8 hits = 32 bits = length of each of processor registers A0-A7, and data registers D0-D7. Each memory location is 1 byte = 8 bits = 2 hits long. It is as important to memorise these key concepts as it is to know that B comes after A in the alphabet!
Week 4 (Monday 8th October 2001)
Wednesday 11.15
Idea of integers in C/C++ on a PC and their length in bytes. Concept of a pointer. Some explanation of the difference between assembly language and high level.
Wednesday 1.15
The fetch execute cycle, the purpose of the IR, the ALU, the address bus and the data bus in this context.
Wednesday 4.15
Batch files in DOS; More practice in Windows and DOS. Some more tests sat.
Friday 10.15
Revision of fetch execute cycle. Brief discussion of the large microprocessor manufacturers and where their main markets are. The growth of the microprocessor out of electronics technology. Introduction to assembly language fields: label, opcode, operand and comment. The teacher-student analogy for the microprocessor and memory. The person-paper analogy which gives rise to the idea of reading from memory and writing to memory.
Week 5 (Monday 15th October 2001)
Wednesday 11.15
Revision of container sizes in 68000 system; introduction to simple move instructions including .b, .w and .l designations. trap #14 and end. Need to consider the fields and to use the tabs to go from field to field. But no tab before #14 in trap #14. Motorala layout rules compared with Intel ones.
Wednesday 1.15
Learning how to work the Teeside University Assembler package.
Wednesday 4.15
Last of the tests. Starting to use the Teeside University 68000 Cross Assembler.
Friday 10.15
Details of the bf, go and md instructions. Batch files. The Teeside assembler provides a software emulation of the 68000. Compare this with uploading machine language to the K comp and the execution of a 68000 software on a real 68000 microprocessor.
Week 6 (Monday 22nd October 2001)
Wednesday 11.15
* Cancelled, with regret. *
Wednesday 1.15
Test
Wednesday 4.15
DOS/Windows Tests; practising batch files and the Teeside Assembler
Friday 10.15
68000 program example; finding the largest number in an array; overview of program (also in C/C++)
-----------------------------------------------------------------------------------------------------------------------------------------------------------------
Holiday
Week (starting Monday 29nd
October 2001)
-----------------------------------------------------------------------------------------------------------------------------------------------------------------
Week 7 (Monday 5th November 2001)
Wednesday 11.15
More thorough treatment of the array processing program to find the maximum number in a list. Notes to be written; review of the instruction set.
Wednesday 1.15
Start of decoders and memory maps.
Wednesday 4.15
Teeside assembler package test for those who are ready; will be conducted on subsequent weeks too. Some people still to pass the DOS test. Peer teaching of the maximum number program and reference to the web site in this regard.
Friday 10.15
More on decoders; memory map and wiring diagram.
Week 8 (Monday 12th November 2001)
Wednesday 11.15
Finishing off decoders
Wednesday 1.15
Test on decoders and memory maps
Wednesday 4.15
Further tutorial/practical work on the max number program and its extension to other related problems. At this stage everyone must be thoroughly conversant with testing the max number program in the 68000 emulator system.
Friday 10.15
Further discussion of container sizes in microprocessor systems. Detailed analysis of movea.l $40, a0. Revision of $ and #. Review Teeside system and pitfalls to avoid in getting it to work.
Week 9 (Monday 19th November 2001)
Wednesday 11.15
More discussion of the maximum number program
Wednesday 1.15
More discussion of the maximum number program with flow charts to represent the if nested in the while.
Wednesday 4.15
Working with the Teeside system
Friday 1.15
while, do, if...else in 68000. Yet to do if.
Week 10 (Monday 26th November 2001)
Wednesday 11.15 and Wednesday 1.15
Explained how to test an ANDed double condition in assembly language. CCR dealt with and in particular the Z, C and N flags. How the BCC, BCS, BEQ, BNE, and BPL instructions work.
Wednesday 4.15
Testing the maximum number program with the Teeside assembler.
Friday 10.15
Test, decrement and branch instructions.
Week 11 (Monday 3rd December 2001)
Wednesday 11.15 and Wednesday 1.15 (provisional)
if in assembly language; revision of BCC, BCS, BEQ, BNE, and BPL instructions. Assembler directives, memory maps, decoders: making a 3 to 8 out of two or 2 to 4. Revision of maximum number program.
Friday 10.15 (provisional)
Student-chosen revision topics. Revision of mechanics of individual instructions. Comparison of principle addressing modes with C++ equivalents. Quick definitions of immediate, direct and indexed addressing modes.
Week 12 (Monday 10th December 2001)
Departmental Examinations all this week
Last day of Term 1: 14th December; first day of Term 2: 7th January.
Week 13 (Monday 7th January 2002)
Wednesday 11.15 & 1.15
Review of the examination paper, particularly the mechanics of each
instruction; revision of the maximum number problem, and its modification to (i)
add the numbers (ii) put zero into each element, (iii) double the contents of
each element (iv) count the number of 53s that occur in the array, (v) count the
number of numbers that are greater than 53 in the array. More thorough
treatment to be given later. How to interpret the instruction set in
regard to say: (i) move <ea>,<ea>
(ii) add <ea>,dn and add dn,<ea>.
Discussion of how far through the course we are and what we've yet to do.
Idea of assembly language being machine-oriented and of high level language being application oriented. Cobol: business filing systems; Fortran: mathematics; Prolog, Modula 2: AI, PLC language: electrical/electronic circuit virtual rewiring. Use of the abbreviation PLC, but of the term, nowadays of Programmable Controller.
Wednesday 4.15
PLC demo to Mary Haugh, Davy Boyd and Peter O'Callaghan.
Friday 10.15
Students worked on creating programs involving array processing while each person got his/her exam paper back to look at. There were discussions with each person about their progress.
Week 14 (Monday 14th January 2002)
Wednesday 11.15 & 1.15
Going over the six elementary examples of PLCs. Finished down to the end of number 5
Wednesday 4.15
Finished off the plc demo to everyone.
Friday 10.15
Finished off the six plc examples. Provided a practical example for number six: a lift where the doors must be closed (S1), the user-button must be pressed (S2) but the overload switch must not be closed (S3). Went over the testing method for the max number in a list program. Still to revise bf, go and md.
Week 15 (Monday 21st January 2002)
Wednesday 11.15
Work on the max number in a list program and its modification to zeroise all elements.
Wednesday 1.15
Test 2.1
Wednesday 4.15
practical cancelled
Friday 10.15
Went over the max number program and the bf, go and md instructions. Started talking about interfacing a PIA to a printer.
Week 16 (Monday 29th January 2002)
Suggested Ideas: Paint-mixing plc project, or Stack, ALD/OLD instructions. Revision. Possibly lectures and practicals on PLCs from Joe Daly. A/D conversion SC, EOC, OE. status and control signals. plc work. Array 68000 programs and practical tests for some or plc practicals. Pushbutton Switch; interfacing to a computer. Revision and new teaching on odds and ends relevant to things we've been doing; review of examination.
Actual:
Wednesday 11.15, 1.15 and Friday 10.15
Paint mixing project discussed.
Wednesday 4.15
Practical; simulation of lift/elevator using plc. Practising 68000
Week 17 (Monday 4th February 2002)
Wednesday 11.15 and 1.15
PIA and parallel port interfacing theory; the distinction between software configuration and the working program that uses the PIA. Allocation of addresses to the PIA so that it occupies four consecutive memory locations. RS1 = 0 for A side and 1 for B side. RS0 is 0 for DR/DDR pair and 1 for CR. The fact that A side and B side are almost identical. How bit 2 of Control Register is used to distinguish between DDR and DR. Revision of the fact that in twos complement notation, bit 7 is 1 for a negative number and 0 for a positive number.
Wednesday 4.15
Practising 68000; 3 people sat and passed their practical tests.
Friday 10.15
Discussion of interfacing a PIA to receive a byte of input from the A side and send a byte of output to the B side.
Week 18 (Monday 11th February 2002)
Wednesday 11.15 and 1.15
Wednesday 4.15
PLC/68000
Friday 10.15
Decoders and Multiplexers
Week 19 (Monday 18th February 2002)
Wednesday 11.15, 1.15
Revision of getting in a byte through A side of a PIA and sending a byte out from the B side of a PIA. Work on the looping program to handle a keyboard stream. Purpose of CR b5, b7 and b1. Notion of active transition. Definitions of control line and status line. The fact that CA1 and CB1 are always status lines, despite their name! CA2 and CB2 can either be status or control, since each of these lines is bidirectional. It's bit 5 of the CR that determines that. When b5 is 0 C2 is input; when b5 is 1 C2 is output.
Wednesday 4.15
Emulator practical tests conducted for three people.
Friday 10.15
More on the keyboard handling program. Timing diagram not yet explicitly discussed, nor the program's interaction with it.
Week 20 (Monday 25th February 2002)
Purpose of the bits of the Control Register on either side of a PIA:
bit 7: set by active
transitions on C1.
bit 6: set by active transitions on C2 when C2 is an input (status) line.
bit 5: determines if C2 is an i/p (i.e. status) line (0) or an output (i.e.
control) line (1).
bit 4: as bit 1 in relation to C2 when C2 used as an input line.
bit 2: determines whether the common shared address refers to the DDR (0) or to
the DR (1).
bit 1: determine what transition is active on C1; 1 for low to high; 0 for high
to low.
Wednesday 11.15
Revision of theory of interfacing a keypad to a computer via a PIA. The various elements discussed: configuration software, program software, control lines, control register. the generation of a pulse on the A side whenever the data register is read and its ending on the next active transition of control line 1. The fact that the reading of the data register on the A side causes something else to happen, namely the resetting of bit 7 of the CR ready for the next response to the going low of of control line 1.
Wednesday 1.15
Test 2.2
Wednesday 4.15
4 practical tests conducted.
Friday 11.15
Conversion of the keyboard interface program to handle a printer. Mention of the fact that the assembly language programs we've looked at thus far are mere slices, unlike C++ programs that are completely end-usable. Thus the keyboard interface program can be regarded as a left end slice, the find max no in list is a middle slice, and the printer interface software is an end slice.
Week 21 (Monday 4th March 2002)
Revision of changes to be made to a keyboard interface system to make it interface to a printer and some notes on that. Hardware and Software Trade-off. Synchronous and Asynchronous, 68230 chip, 74138, branching instruction revision, transducers and look-up tables. structured programming revision, 68000 development systems, cross-assembly and emulators.
Wednesday 11.15, 1.15 and 4.15
cancelled
Friday 11.15
Loaf of bread analogy for assembly language programs. Introduction to program for counting characters. C++ equivalent. Spec of the rough equivalent program in 68000 covered. Program itself not yet started.
Week 22 (Monday 11th March
2002)
Wednesday 11.15, 1.15
More work on the counting of the number of characters in a CR-terminated string program. Discussion of symbol table and pseudo-ops. Efficiency - its importance now and its importance in the past. Each instruction has a number of clock cycles allocated to it. One dives this time by the clock frequency to find the time taken for execution of an instruction. Flow charting a program and the use of language independent assignment statement symbolism. Purpose of comments - to explain strategy, not the mechanics. Avoidance of immediate addressing (#) inside a loop because of the time it takes.
Wednesday 4.15
One practical test conducted; practice on using the assembler.
Friday 10.15
Completed the three versions of the program to count the number of characters in a character string up to the occurrence of a CR. Went over the test, decrement and branch instruction.
Week 23 (Monday Tuesday 19th March)
Departmental Examinations this week
Last day of Term 2: 22nd March; first day of Term 3: 8th April.
Week 24 (Monday 8th April 2002)
Wednesday 11.15
Easter Examination
Wednesday 1.15
Web Programming using handout. Java not yet covered.
Wednesday 4.15
3 to 8 decoder 74XX138; hardware/software trade-off, including 7447, PIA DDR/DR select, implementing a burglar/fire alarm; multiplexers used to implement combinational functions.
Friday 10.15
The need to download appropriate platforms to develop web applications. In particular one might find the following useful: a Perl interpreter, obtainable from www.perl.com, an editor from www.dzsoft.com, and a local server from www.Xitami.com. These are all free unless you want to edit programs longer than a certain no of lines. In that case you need a paid-for version of the editor from www.dzsoft.com. A description was given of what a server is in simple terms, i.e. that it is a piece of software and that it is a different context entirely. A server can either be remote as in the case of an ISP or it can be localised on the developer's own machine. The latter can easily be the case in regard to the Xitami server downloaded from the Internet.
Week 25(Monday 15th April 2002)
Wednesday 11.15
Going over the HTML and the Perl listings. The idea that the Perl script can create customised web pages to be sent back to the client. What is meant by radio buttons and how they differ from check boxes. The importance of the name parameter linking the HTML with the Perl script. Revision of the communication process between client, middleware written in Perl cgi and the database or data file back-end.
Wednesday 1.15
Block diagram of a complete closed loop control system, status and control signals, synchronous and asynchronous, SC, EOC, OE. Number of bits out of an ADC and the resolution of the quantity measured.
Wednesday 4.15
Thermistor in a negative feedback op amp. Look up tables in dealing with transducers compared to equations.
Friday 10.15
Peripheral Circuits such as a 6820 PIA or a 68230 PI/T provide buffering and handshaking. Using a PROM for address decoding. File Transfer Protocol (ftp) is the Internet protocol for transferring files from one machine to another over the Internet.
Week 26 (Monday 22nd April 2002)
Wednesday 11.15 and Wednesday 1.15
File Transfer Protocol, Paint mixer plc project, Interfacing a keyboard/printer to a PIA
Wednesday 4.15
Giving back test papers
Friday 10.15
Test 3.1
Week 27 (Monday 29th April 2002)
Optional revision week. You are all welcome to attend, but if you prefer to stay at home and study there, that's fine too. If you do come to class that week, be SURE to come armed with questions.
EXAMINATIONS START ON TUESDAY 7TH MAY 2002 (SUBJECT TO VERIFICATION)
CIC Final Examination:
On or after 7th May 2002. Possibly:
CIC Exam: 23rd May 9.15 a.m. Chapel in College Street (check this information with official documents)
Check with official documentation that will be posted to your homes.
-----------------------------------------------
-----------------------------------------------
-----------------------------------------------
Last academic session (i.e.
2000-2001)
provided for guidance
as to what may be coming up this session
Week 1(previous session)
No Second Year Classes
Week 2 (previous session)
Wednesday 11.15 a.m.
Due to the need to get through sufficient material in order to prepare for practical class at 4.15 p.m., no outline of the course will be given until Friday morning at 11.15. Instead the topic of programmable controllers will be introduced including both ladder logic and list form of programming.
Wednesday 1.15 p.m.
After the previous hour's general introduction to plcs, the tentative start to programming them (before lunch) will be firmed up sufficient to make the practical worthwhile.
Wednesday 4.15 p.m.
Practical on plcs mainly. Students will divide up into groups that will study their notes. Each group will be called over in turn to see the demonstration. Another station may be set up for each group to practice on for five minutes or so after they've left the demonstration.
Friday 11.15 a.m.
Cancelled due to their being no room.
Week 3 (previous session)
Wednesday 11.15 a.m.
The five elementary exercises on PLCs
Wednesday 1.15 p.m.
Continuation of 11.15 session. Recap on the plc lab work - Going through the ECUR (edit compile upload run) cycle. Preparation for this week's work, involving the idea of NOT as well as last week's AND and OR.
Wednesday 4.15 p.m.
Practical.
Friday 11.15 a.m.
Discussion of the stack and how it's used in function call to store return addresses. Comparison with the queue.
Week 4 (previous session)
Wednesday 11.15 a.m.
The OLD and ALD instructions and the concept of the stack in plc programmes.
Wednesday 1.15 p.m.
More OLD and ALD programs. Introduction to exercises to try in the lab.
Wednesday 4.15 p.m.
Practical on OLD and ALD programs. The switch and relay status indications in the compiler system.
Friday 11.15 a.m.
The ECUR cycle. Download or upload. The rotating drum analogy. The distinction and disjunction between host and target. Reminder of the different type of host system. Summary of PLC instructions met so far. A, AN, O, ON, LD, LDN, ALD, OLD, =, MEND. Having several networks in the one file. The idea of applications-oriented languages such as Pascal, Fortran, Cobol, PLC languages - and that they're used by non-computer specialists, e.g. mathematicians using Fortran; electricians using PLC languages. Assembly language by contrast is machine-oriented and is used by computer specialists.
Discussion on the centrality of lectures in the delivery of the course.
Week 5 (previous session)
Wednesday 11.15 a.m.
Number systems and why hexadecimal is used by computer scientists. Converting between systems. Gave out discs for home development of 68000 programs. Ideas of emulation and cross-compilation discussed without notes yet. The possible need to run Windows 95 in safe mode.
Wednesday 1.15 p.m.
Ideas about the development of desk-top computers through the eighties and nineties. Memory sizes at different times, e.g. 1981, 1883, 1994, 2000. Fabrication technology changed by leaps and bounds. Computer architecture not changed so much. Simplified schematic diagram of the motherboard of the computer: mp, RAM, ROM, ACIA, PIA. The three buses, their directionality. The teacher/class analogy. The telephone analogy. The R/W line of the control bus. RAM should be RWM.
Wednesday 4.15 p.m.
PLC programming exercises. The six elementary programs and another where a list form had to be written to match a ladder diagram form of a program. This would involve ALD/OLD. Few students got the last exercise done.
Friday 11.15 a.m.
Test worth about 4% of continuous assessment mark.
Week 6 (previous session)
Wednesday 11.15 a.m.
Address bus width, 16 bits, 20 bits, 24 bits, 32 bits. Laws of indices. Generations of computers. Revision of conversion from hex to binary and back. Concept of page number and word number in 16 bit addresses.
Wednesday 1.15 p.m.
Chart showing chronology of the PC. Today's computers can have up to 4GB of memory. Word length: byte, word and long word. The terms CPU and microprocessor. Intel and Motorola; dedicated vs general-purpose mp-based systems. Applications oriented languages. Only one C++ but many compilers for different mps. Each mp has its own assembly language. Ten times as long to write, no one language - why then learn assembly language? One answer is that someone has to and that falls on us Industrial computing people and other such people. Examples of Applications oriented languages, Fortran, Cobol and PLC language.
Wednesday 4.15 p.m.
Exercise in converting a network expressed in ladder logic form to list form and then automatically converting it back again to verify correctness of the solution. Suggestion that the list form be written in two ways. Details given of the syllabus for the tests that will begin on Week 9. Individual students will be asked to demonstrate use of plcs on that week and subsequent weeks. Announcement of class time on Friday changing to R2. Reminder given of web site for the class.
Friday 11.15 a.m.
Revision of longword, word, and byte. mp board again. Fetch execute cycle - complete description. Stored program, machine language. Program counter; concept of pointing. The org statement. Handing back test results. Handing out of instruction set.
Week 7 (23rd October...) (previous session)
Ian Downey will be away during this week.
Week 8 (30th October...) (previous session)
Friday 11.15 a.m.
Introduction to assembler directive/pseudo-op. A revision note on the Fetch-Execute cycle, mentioning such terms as pointing, PC, ALU, IR, buses, reading/writing. Bidirectionality/unidirectionality of buses. Definition of register as a storage location in a mp or a port chip. Definition of a memory location as a storage location on a memory chip. A simple assembly language program to add 2 to the contents of a memory location. The idea of the four fields of assembly language, label, op-code, operand and comment.
Week 9 (6th November...) (previous session)
Wednesday 11.15 a.m.
A simple program to add 2 to a variable, either byte, word or longword. Revision of the concept of byte, word and longword and its application to assembly language. How the ORG statement relates to the PC. Revision of the concept of assembly, fetch-execute cycle and so on. How to do assembly language programming using the Teeside facility.
Wednesday 1.15 a.m.
Program to do 16 bit sum of data complete with equ statements and ds statements. Symbol Table covered. The idea of the Motorola and Intel conventions in regard to source and destination and also in regard to storage in memory locations. Motorola puts destination on the right. Motorola stores data so that low order goes into higher addressed location and high order goes into lower addressed location.
Wednesday 4.15 p.m.
Most people in the class tutored in how to install and run the Teeside Assembler. More work on this to be done. Instructions posted on wall near board. Photocopies being made. Also available on web site.
Friday 11.15 a.m.
Class cancelled
Week 10 (13th November) (previous session)
Wednesday 11.15 a.m.
Some C array processing problems to help in 68000 work. The control stuctures implemented using only conditional and unconditional branching.
Wednesday 1.15 p.m.
Control structures using conditonal and unconditional branching in C. Brief outline of how that's done in 68000.
Wednesday 4.15 p.m.
Continuing with practice of Teeside Assembler, trying out move.b, move.w, move.l.
Friday 9.15 a.m.
Review of Teeside assembler. Addressing modes in C and their equivalents in 68000. The bare bones of an array processing loop in 68000.
Week 11(20th November) (previous session)
Wednesday 11.15 a.m.
Example where the elements of an array in 68000 are summed. Discussion of BNE instruction and of autoincrement of the pointer.
Wednesday 1.15 p.m.
Examples: Finding the maximum number in an array in C. Summing the elements of an array in C. Converting an in...else statement to use only conditional and unconditional branching. Example in 68000 where the maximum number in an array is calculated. Got down as far as the CMP instruction. Instruction only partially explained.
Wednesday 4.15 p.m.
Class cancelled due to meeting.
Friday 11.15 p.m.
Test
Week 12 (27th November) (previous session)
Wednesday 11.15 p.m.
Went over the test questions. Distinguished clearly between # and $ and what pointing was about.
Wednesday 1.15 p.m.
Handed out the instructions for the Teeside assembler and (on the reverse side) finding the max no in an array. Went over this program down to the if statement with bcc. Started describing bcc.
Wednesday 4.15 p.m.
Handed back the test papers individually while students worked on the max no in an array problem on the machines. Yet to check on whether they managed it or not.
Friday 11.15 a.m.
BCC, BCS, BEQ, BNE and CCR. More work on the looking for maximum number in an array.
Week 13(4th December) (previous session)
Wednesday 11.15 a.m.
Decoders; 2 to 4 decoders, 3 to 8 decoders, making a 3 to 8 decoder from two of 2 to 4 decoders and a not gate. Making a 4 to 16 decoder from five of 2 to 4 decoders. Enable Line, active low/active high. Truth tables. Their use in internal memory chip decoding. 2s complement notation.
Wednesday 1.15 p.m.
Memory map for a 8 bit address bus, where there is a 128k RAM, a 64k ROM and sixteen 4-byte PIAs. Concept of Memory map.
Week 14 (11th December) (previous session)
Departmental Examinations
Last day of Term 1: 15th December; first day of Term 2: 8th January.
Week 15 (8th January) (previous session)
Wednesday 11.15 p.m.
Went over the mechanics of assembly language instructions with reference to the exam paper
Wednesday 1.15 p.m.
Went over max no in a list problem
Friday 11.15 a.m.
Numerous examples involving MOV, BCC, BCS, BEQ, BNE, CMP, SUB, ADD, BXX.S vs BXX alone. The Carry Flag. The two different formats of the while loop in 68000. Revision of the finding max number in an array.
Week 16 (15th January) (previous session)
Wednesday 11.15 p.m.
Revision of CCR, Z and C, set (1), reset/clear (0), BXX.S, BXX, move, add, sub, cmp, bxx, bra, bcc, bcs, bne, beq. Two methods of representing the while loop. Idea of a pointer. Biscuit tin analogy. Programmer's model of the mp. Problems to tacke in the practical: find max, min, sum, put zeros, count number of 53s.
Wednesday 1.15 p.m.
decoders, 2 to 4, insides of 2 to 4, general rule of n to 2 to power n. 3 to 8 from 2 of 2 to 4 and 1 of 1 to 2. 5 of 2 to 4s giving a 4 to 16.
Wednesday 4.15 p.m.
emulator practice and max, min, sum, zeroing and counting occurences of a particular number.
Friday 11.15 a.m.
Use of decoders in address decoding, internally to chips and externally. Two examples of internal deoding; introduction to external decoding in context of 128/64/16*4; Role of address line 7. The concept of memory map - roughly.
Week 17 (22nd January) (previous session)
Wednesday 11.15 a.m.
Finished off the address decoding problem. Still to do: go over it again and clarify the ideas of memory map. The idea of 1 to 2 decoding and 4 to 16 decoders. Revision of CS lines. Definition of Memory location/registers.
Wednesday 1.15 p.m.
Test
Friday 9.15 a.m.
Class cancelled
Week 18 (29th January) (previous session)
Wednesday 11.15 a.m
Address decoding: revision of example, memory map, 1 to 2 decoder, 4 to 16 decoder. Compensating for a lack of CS lines.
Wednesday 1.15 p.m.
Introduction to the PIA. 2 sides, almost symmetric, control lines, DR, DDR, CR, Purpose of DDR. Internal decoding from bit 2.
Friday 9.15 p.m
Revision of PIA and a number of examples such as (i) the difference between a memory location and a register (ii) allocating addresses to the registers of a PIA given the base address. Exercise in configuring a port as an output and sending data out from it. Brief introduction to repeating the exercise for an input port and collecting in bytes repeatedly, storing them in an array.
Week 19 (5th February) (previous session)
Wednesday 11.15 a.m.
Interfacing a PIA to a printer and then to a keyboard to process exactly one byte of data. Use or equ. Revision of the PIA. Preview of what is coming with the looping programs and the associated timing diagrams.
Wednesday 1.15 p.m.
Test
Wednesday 4.15 p.m.
Continuation of Last Week's Class
Friday 11.15 p.m.
Timing Diagram and program to interface PIA to keyboard and to printer: no code written, started timing diagram. the concept of active transition on C1. Automatic pulses on C2 when 100 in b543.
Week 20 (12th February) (previous session)
Wednesday 11.15 a.m.
Continuation of timing diagram. Conversion of timing diagram of last week to a printer interface. Microcomputer Development System. Burglar Alarm Circuit.
Wednesday 1.15 p.m.
Going over test paper.
Wednesday 4.15 p.m.
?
Friday 11.15 p.m.
Revision of interfacing a printer or keyboard to a PIA. Did not yet fully describe tst instruction. Draw diagrams relating to the artificial/natural light problem.
Week 21 (19th February) (previous session)
Wednesday 11.15 a.m.
Completion of light switching on and off program. Bitwise OR and AND instruction in 68000. Use of BCLR and BSET Details of TST instruction. Revision of address decoding.
Wednesday 1.15 p.m.
Revision of interfacing a printer/keyboard to a computer.
Wednesday 4.15 p.m.
Cancelled due to no attendance.
Friday 11.15 p.m.
Cancelled due to no attendance.
Week 22 (26th February) (previous session)
Wednesday 11.15 a.m.
Heating system problem.
Wednesday 1.15 p.m.
Heating System Problem. Overview of 68000 instruction set.
Wednesday 4.15 p.m.
?
Friday 11.15 p.m.
Test
Week 23 (5th March) (previous session)
Wednesday 11.15 a.m.
Actual: Going over the test paper involving interfacing a keyboard to a computer and interfacing a printer to a computer.
Wednesday 1.15 p.m.
The other address decoding problems. The distinction between complete and partial address decoding. The ultimate RAM capacity of a PC. 24 bit bus allowing only up to 16 MB. Introduction to double conditions via C examples.
Wednesday 4.15 p.m.
Testing of some students
Friday 11.15 p.m.
example that involves a test, decerement and branch instruction. No notes yet written on this topic.
Week 24 (12th March) (previous session)
Departmental Examinations all this week
Week 25 (19th March) (previous session)
Wednesday 11.15 a.m.
Completion of test, decrement and branch instruction example with associated notes. if (re AND re) implemented in 68000.
Wednesday 1.15 p.m.
Hardware/software trade off, and 7447 and seven segment display; need to supply a current sink rather than a current source for power reasons.
Wednesday 4.15 p.m.
?
Friday 11.15 p.m.
Revision of the mechanics of some of the 68000 instructions. Revision of printer/keyboard interfacing. MDS discussed and diagram drawn.
Week 26 (26th March) (previous session)
Wednesday 11.15 a.m.
Seven segment display routine that takes binary and converts it to 7-segment information.
Wednesday 1.15 p.m.
Transducer to A/D. SC, OE, EOC. Error due to finite sampling rate. Error due to rounding up or rounding down. Calculation or look up table with interpolation to work out what the corresponding physical quantity is. Memory vs execution speed trade-off. Hardware/software tradeoff. PIA an example of balance between hardware and software.
Wednesday 4.15 p.m.
Practical test for some of the students.
Friday 11.15 p.m.
Revision of indexed addressing. Pushbutton switch and the voltages when (i) button open and (ii) button closed. Cross-coupled NAND gate as burglar alarm. Switch debouncing in hardware using cross-coupled NAND gate. Start of program to do debouncing in software.
Week 27 (2nd April) (previous session)
Wednesday 11.15 a.m.
Planned: Program to do switch debouncing. Summary or hardware software tradeoff, Summary of advantages and disadvantages of assembly language programming.
Actual: pushbutton switch debouncing and counting program; flow chart for the program.
Wednesday 1.15 p.m.
Planned: Finish off PLCs; remind students of OLD and ALD.
Actual: Addressing Modes; revision of Teeside Assembler package; byte dissembly example; further notes on this will be on the web.
Wednesday 4.15 p.m.
Practical Tests
Friday 11.15 p.m.
Planned: Revision of cross-assembler; definition of cross assembler.
Actual: Test
Last day of Term 2: 6th April; first day of Term 3: 23rd April.
Week 28 (23rd April) (previous session)
Wednesday 11.15 a.m.
PLCs: in particular internal relays and timers. Byte-disassembly program - finish this. Advantages and disadvantages of assembly language programming.
Wednesday 1.15 p.m.
Test
Wednesday 4.15 p.m.
Practical Tests
Friday 11.15 p.m.
Programmer Controller flip-flop program in ladder logic, Siemens Simatic programmable controller OLD instruction and idea of stack revised, 68000 byte disassembly, bitwise AND and revision of if...else construct expressed in 68000.
Week 29 (30th April) - Week before exams (previous session)
Wednesday 11.15 a.m.
Optional Revision Class.
Wednesday 1.15 p.m.
Test for those who have to sit it.
Wednesday 4.15 p.m.
Session held on request from class members.
Friday 11.15 p.m.
Session held on request from class members.
Week 30 (Tuesday 8th May) (previous session)
CIC Exam 2000-2001: was held on 23rd May 9.15 a.m. Chapel in College Street